Name: Tutorial Group Number:
Name:
Tutorial Group Number:
CS2100 (AY2013/4 Semester 2)
Assignment #2 You are to do this assignment on your own. (Students found copying will be penalised.) Please fill in your name and tutorial group in the box above, and your answers in the space indicated below. You need not show your working.
Submit this assignment before 5 March 2014, Wednesday, 2pm on the IVLE workbin. Answers will be released on that day so late submission will not be accepted. Please submit to the correct IVLE workbin (of your own tutorial group), and name your file that includes your matriculation number (eg: A0091234X.doc or A0091234X.pdf). F
0
1
2
3

4:1
MUX
1
0
F
0
1
2
3

4:1
MUX
1
0
1. Given the following Boolean function F(A,B,C,D) = B(C' + D) + C'(A + B) implement it using a 4:1 multiplexer. The block diagram is shown on the right. For the selector inputs, choose one from these 6 options: AB, AC, AD, BC, BD, and CD. Fill in the values such that no additional logic gate is needed. Note that complemented variables (A', B', C', D') are not available. Constants 0 and 1 are available. [5 marks] Multiplexer input 0: Multiplexer selector 1: Multiplexer input 1: Multiplexer selector 0: Multiplexer input 2: Multiplexer input 3: A7 | A6 | A5 | A4 | A3 | A2 | A1 | A0 | F2 | F1 | F0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | X | X | X | 1 | X | X | X | X | X | X | X | 1 | 1 | 1 | 0 | 1 | X | X | X | X | X | X | 1 | 1 | 0 | 0 | 0 | 1 | X | X | X | X | X | 1 | 0 | 1 | : | : | 0 | 0 | 0 | 0 | 0 | 0 | 1 | X | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 |

A7 | A6 | A5 | A4 | A3 | A2 | A1 | A0 | F2 | F1 | F0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | X | X | X | 1 | X | X | X | X | X | X | X | 1 | 1 | 1 | 0 | 1 | X | X | X | X | X | X | 1 | 1 | 0 | 0 | 0 | 1 | X | X | X | X | X | 1 | 0 | 1 | : | : | 0 | 0 | 0 | 0 | 0 | 0 | 1 | X | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 |

2. Below is a partial function table of an 8-to-3 priority encoder. It consists of 8 inputs (A7 to A0) and 3 outputs (F2 to F0). The only invalid input combination occurs when all inputs are zero. ‘X’ represents don’t-care.

Write out the simplified SOP expressions for F2, F1 and F0. [5 marks] F2 = F1 = F0 =

3. Study the following circuit that uses 24 decoders with 0-enable and negated outputs. [4 marks] (a) What is the expression at the output (labeled X) of the left decoder? (b) What is the Product-of-Maxterms expression for the function H(K,L,M,N), in M notation? 0
L
M
K
N
H
0
1
2
3

S1
S0
24
DEC
EN
0
1
2
3

S1
S0
24
DEC
EN
X
0
L
M
K
N
H
0
1
2
3

S1
S0
24
DEC
EN
0
1
2
3

S1
S0
24
DEC
EN
X

(a) X = (b) H = M( ) 4. Study the sequential circuit below with state ABC. [6 marks] (a) If the initial state is 0 (or 000), what state is the circuit in after 2 clock cycles? (b) If the initial state is 1 (or 001), what state is the circuit in after 2 clock cycles? (c) A sink state is one that, once landed in that state, it is impossible to get out of it under normal circumstances. Identify all the sink states in this circuit. (a) If the initial state is 0 (or 000), what state is the circuit in after 2 clock cycles? (b) If the initial state is 1 (or 001), what state is the circuit in after 2 clock cycles? (c) A sink state is one that, once landed in that state, it is impossible to get out of it under normal circumstances. Identify all the sink states in this circuit.
J

Clk
Q
Q'
K
D

Clk
Q
Q'

T

Clk
Q
Q'

A
Clock
B
C
J

Clk
Q
Q'
K
D

Clk
Q
Q'

T

Clk
Q
Q'

A
Clock
B
C

(a) (b) (c)