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Term Paper
On discipline “Microprocessor Systems”

Done by *****
Student of ********
Checked by *********
Task
Design MP System, based on single-chip 8-bit microprocessor KR580VM80AOA with the following characteristics: 1. CPU: KR580VM80A0A. 2. RAM: 24 KBytes 3. ROM: 40 KBytes 4. Controlling for parity. 5. Number of digital inputs: 8. 6. Number of digital outputs: 8. 7. Interrupt controller, with a fixed order of service. 8. DMA channel. 9. Serial channel. 10. Timer / counter.

Content
Introduction
1. The description of applied elements 2.1 Microprocessor KR580VM80A 2.2 Oscillator of clock pulses KP580ГФ2 2.3 Control unit of interruptions KP580BH5 2.4 System control unit KR580VK28 2.5 Programmed consecutive interface KR580VV51 2.6 Control unit of the keyboard and display KR580VV79 2.7 Microcircuit of random-access memory K537PУ17 2.8 Microcircuit of ROM K573PФ6 2.9 Microcircuit of decoder K155ID3 2.10 Microcircuit K514ИД2 2.11 Buffer register 1533АП5 2. Calculation part 3.12 Calculation and planning of address space of memory 3.13 Construction of circuit designs of decoding of addresses of memory 3.14 Calculation and planning address for input-output devices 3.15 Construction of circuit designs of decoding of addresses of input-output devices 3. The block diagram 4. A circuit diagram
Conclusion
Reference list
Introduction
In the given academic year project the microprocessor complete set of series KP580 is observed. This set of microcircuits, is analogous to a set of microcireuits Intel 82xx. Represents a 8-digit complete set on a basis n-МОП production engineering. System of commands CM1800, GOST 11305.910-80. The majority of microcircuits is analogues of chips of series MCS-85 of firm Intel.
Now for construction of various microprocessor systems, data processing units and various devices of computing machinery microprocessor systems on the basis of series KP580 are widely used.
Into complete set KP580 enters: * Microprocessor KR580VM80A0; * System control unit KR580VK28; * Parallel interface KR580VV55; * The control unit of interruptions KP580BM59; * The keyboard and display KR580VV79 control unit.
Though this microprocessor complete set has been created in the eighties, it is widely used till now and studied in various educational institutions as, studying it, it is possible to fathom work of more difficult microprocessor systems.
Microprocessor KR580 is used in various systems with not high demands to productivity, and in those systems when use of more powerful processors economically it is not favourable.
The given academic year project is necessary, that pupils studied basic elements of a microprocessor complete set, fathomed their work, learnt to build independently microprocessor systems, learnt to find maladjustments and to eliminate them.
1. The description of used elements
1.1 Microprocessor KR580VM80A0
The processor contains 4500 transistors on production engineering 6 microns n-MDP processor KR580VM80A0 Clock rate - 2 MHz. Each command is carried out for 1. 5 machine cycles, each of which consist from 3. 5 steps. Average output 200. 300 thousand operations a second on frequency of 2 MHz. The microprocessor has separate the 16-digit bus of the address and the 8-digit bus of the data. The 16-digit bus of the address provides a direct addressing of an external memory in volume to 64 Kb and 256 devices of feeding into/leading-out.

1.2 Oscillator of clock pulses KP580ГФ24
Microcircuit KP580F024 - the clock of phases C1, C2, is intended for synchronisation of work of microprocessor KR580VM80A0.
The oscillator forms: * Two phases CI, C2c the positive pulses shifted in a time, amplitude 12V and frequency 0,5 - 3,0 MHz;

* The gating signal makes STB lasting not less than (TОП/9-15нс), where the Top - the period of clock signals of basic frequency; * Clock signals. With, synchronous with phase C2, amplitude of level TTЛ.

1.3 System control unit KR580VK28
Microcircuit KP580BK28 - the system controller, is applied in microprocessor systems on the basis of microprocessor KR580VM80A0 to formation of operating signals.
The system controller forms operating signals on signals of a condition of the microprocessor at the reference to the STORAGE: RD and WR, at the reference to YBB: RDIO and WRIO, INT A, and also provides reception and transfer of the 8-digit information between the channel of the data of the microprocessor.

1.4 Control units of interface RS 232
1.4.1 Microcircuit KP580BB51
Microcircuit KP580BB51 -universal the synchronous transceiver, is intended for a hardware representation of the consecutive report of an exchange between microprocessor KR580VM80A0 and channels of consecutive transfer of a digital information.
The microcircuit converts the parallel code gained from the central processor, in a consecutive stream of symbols with office bits and gives out this stream in the consecutive communication channel with various speed, and also carries out return transformation: a consecutive stream of symbols in parallel a 8- discharge word.

1.4.2 Timer KR580VI53
Microcircuit KP580BИ53 - the three-channel programmed device (timer), is intended for the organisation of work of microprocessor systems real time. The programmed timer is realised in the form of three independent 16-discharge channels with the general circuit design of management. Each channel can work in six regimes.
The operating word defines a channel operating mode, account type, a format of numbers.

1.5 Control unit of interruptions KP580BH59
It is intended for the organization of machining of the priority 8-level inquiries of interruptions from eight external devices. Control unit KR580VN59 has been developed for the microprocessor systems built only on the basis of microprocessor KR580VM80A0. Control units of interruptions can be cascaded for reception 64-urovnevoj systems of interruptions.

1.6 Control unit of the keyboard and display KR580VV79
The programmed interface device intended for input and output of the information in systems, executed on a basis 8 and 16-digit microprocessor KR580VM80A0. Besides, the microcircuit can be applied and as the independent device at performance of the demands shown to electric and time parameters.
The keyboard part provides data input in a microcircuit through lines of retrace RET7-RET0 from the keyboard (a keyboard matrix in volume 8 words * 8 categories with possibility of expansion to 4*8 words *8 categories) and matrixes of sensing transducers (8 words *8 categories), and also feeding into on a gating signal (8 words * 8 categories). For information storage in a microcircuit it is provided 8 of a random-access memory.
The display part of a microcircuit provides an information leading-out on 4- digit channels DSP A3-DSP AO and DSPB3-DSPB0 in the form of a bit pattern on 8 and 16-digit digital or alphanumeric displays.

1.7 Microcircuit of random-access memory К537РУ17
Static asynchronous a random-access memory on the basis of KMOP-STRUCTURES.
On the instructions of a random-access memory 24 Kb are necessary for us. Hence, it is necessary for us to put 3 piece.
Classification parameters К537РУ17: * Information capacity - 64 Kbit = 8 Kb * The organisation - 8K*8 * Address sampling time - no more than 200 nanoseconds. * Exit - three conditions

Remarks: M - Any combination of levels or the signals, distinct from –CE1=L, CE2=H 1.8 Microcircuit of ROM K573PФ6
On the instructions of 40 Kb - needed 5 pieces.
For abrasion of the written down information the microcircuit needs to be taken from the contact device, to close all its leading-outs a strip of a foil and to place under source YO of illumination, providing it blasting. However abrasion can be made, without taking a microcircuit from the contact device but then it is necessary to disconnect a supply voltage and signals. Typical sources of erasing radiation - arc mercury lamps and lamps with mercury steams in quartz balon buss: ДРТ-220, ДБ-8, etc. Radiation penetrates to crystal through a pellucid window in a case cover. A time of abrasion 30... 60 minutes.
For protection from casual abrasion of the information the window in a case cover is closed by a special film.

1.9 Microcircuit of decoder K1551D3
К155ИДЗ- The decoder, allowing to convert the four-digit code arriving on entries A0-A3 in voltage of low logic level, appearing on one of sixteen exits 0-15. The decoder has two entries of the permission of decoding E0 and El. These entries can be used as logic when decoder ID3 serves demultiplexor the data. Then entries AO-A3, are used as address to direct the data flow, accepted by entries E0 or El, on one of exits 0-15. On the second entry E not used in this turning on, it is necessary to submit voltage of low level.
On entries E0 and El signals of the permission of exits are given to eliminate current emissions by which decoding of the codes appearing not strictly synchronously (for example, pulsations arriving from the counter is accompanied).

To allow passage of the data on exits, on entries EO and El it is necessary to give voltage of low level. These entries are necessary also at escalating of number of categories of a decoded code. When on entries EO and El there are voltage of high level, on exits 0-15 there are high levels.
Control unit sampling to the concrete address is carried out by means of decoder K155ID3 (fig. 9). Appointment of its leading-outs is shown in table 15.

1.10 Microcircuit K514ИД2
The display is built on the basis of 8-discharge 7-segmentonogo the indicator with the general anode CD8-BW30R6-A11, red light emission. One such indicator is necessary for an academic year project. Management of these indicators microcircuit K514ИД2 (carries out fig. 10.).

For economy of leading-outs of the microcontroller and as for convenience of a writing of the program on a leading-out of numerical values on seven-segment indicators, in the device are applied bit pattern decoders in a code of seven- segment indicators. In the capacity of bit pattern converters in seven-element the industry releases decoders K514ID1, K514ИД2, KP514ИД1, KP514ИД2. For teamwork with the indicators having the general anode - AJIC333E, we take microcircuit KP514ИД2. According to Figure 10, the part of leading-outs is connected to the control unit on which on the decoder the number in binary a code arrives, and other part of leading-outs goes on the seven-segment indicator. As there is a leading-out of management of the decoder. At supply on this entry logic “1” the decoder is switched on, that is the data is translated from a bit pattern in a code of seven-segment indicators. If a tax logic “0” the decoder is switched out. The maximum target current of this decoder makes 25 мА. Its distinctive feature is that the resistors restricting a current, in it are absent.

1.11 Buffer register 1533АП5
For increase in load-carrying capacity of the bus of the address of the microprocessor and the coordination of these buss with memory and external devices are necessary шинные shapers. In this Ministries of Railways in the capacity of bus shaper of the bus of the address are used buffer registers 1533АП5 (fig. 11.). The address bus has 16 categories as this register has 8 categories, for buffer construction 2 microcircuits is required. One microcircuit forms the buffer for categories of the bus of A0-A7 address, and another — A8-A15. Appointment of leading-outs is resulted in table 16.

2. Calculation part
2.1 Calculation and planning of address space of memory
Under the task it is necessary for ROM in volume of 40 Kb, a microcircuit in volume on 8 Kb, hence, it is taken necessary to put such 5 microcircuits.
On the instructions of a random-access memory 24 Kb are necessary. The 3 microcircuits in volume of 8 Kb are taken.
As the microprocessor starts to carry out programs from 0 address (after turning on or dump) on it since 0 address should be, is installed ROM in which the program to start device work registers. In the rest of addresses of memory the random-access memory places.

Following stage calculation and construction of decoding of addresses follows.

2.2. Construction of circuit designs of decoding of addresses of memory

The circuit design 1. Construction of function for ROM

The circuit design 2. Construction of function for ROM 2

The circuit design 3. Construction of function for ROM 3

The circuit design 4. Construction of function for ROM 4

The circuit design 5. Construction of function for ROM 5

The circuit design 6. Construction of function for ROM 6

The circuit design 7. Construction of function for a random access memory

In the capacity of the analysis of four senior categories of the bus of the address it is possible to use the decoder binary-coded decimal which gaining a bit pattern on an entry activates an exit with matching number. Exits of the decoder for each microcircuit we merge function And.
The circuit design 8. Construction by means of the decoder

2.3 Calculation and planning address for input-output devices.
For input-output devices planning of addresses is carried out analogously.
Table 14 - An arrangement of microcircuits of input-output devices to addresses.

2.4. Construction of circuit designs of decoding of addresses of input-output devices

The circuit design 8. Construction of function for BB51

The circuit design 9. Construction of function for BИ53

The circuit design 10. Construction of function for BH59

The circuit design 11. Construction for BB79

In the capacity of the analysis of four senior categories of the bus of the address it is possible to use the decoder binary-coded decimal which gaining a bit pattern on an entry activates an exit with matching number.
Exits of the decoder for each microcircuit we merge function And.
The circuit design 12. Construction by means of the decoder.

The block diagram

The block diagram defines the basic composition of a product, its appointment and interconnection.
The clock oscillator (TF) forms a signal of system dump RESET for installation of the CENTRAL PROCESSING UNIT and other devices in an initial state, and as pulses for synchronisation of work of devices. With the signals of the oscillator of clock pulses provides demanded sequence of work of all devices of microprocessor system.
The microprocessor forms address bus SHA multiplexed the bus of data HD with the bus of management HU. For increase in load-carrying capacity of the bus of the address the buffer register is used.
Demultiplexing carries out system control unit SK, forming on the exits the bus of data HD and operating signals.
Sample of microcircuits of memory of a random-access memory and ROM, depending on a condition of address lines HA, decoder DS carries out.
The microprocessor system contains control unit of the consecutive interface, senders and receivers which are synchronised independently from each other by signals from interval timer PT. The control unit of the consecutive interface occupies two lines of interruption which serve the control unit of interruptions PKP.
At receipt of interruption control unit PKP forms a signal to the microprocessor, and that in turn if interruptions are allowed, forms a signal. Functions of a keyboard input and information representation on indicators are provided with control unit KKD.

The central processor device includes microprocessor VM80 in the minimum environment of additional microcircuits: 1) Clock oscillator GF24 which is synchronised by the crystal vibrator with frequency of 18 MHz. Entry RDYIN is connected through resistance 1 clod for formation of high level on this exit. Entry RESIN is connected to the button with normal dead contacts, RC the chain is intended for formation of signal RESET at the moment of turning on of MP and for protection against a tinkling sound of contacts of the button. The capacity is switched on in a crystal vibrator chain 20 hO for start of the oscillator at the moment of an applying voltage. 2) Buffer registers AII5 are intended for increase in load-carrying capacity of the bus of the address (System Address Bus) the microprocessor. 3) System control unit VK28 forms on the exits the system bus of the data (System Data Bus) and the management bus (System Control Bus). Its entries STSTB, HLDA, WR, DBIN are connected to matching exits of the microprocessor and the clock oscillator. Entry BUSEN is earthed.
Other control units, and also modules of memory of ROM and random- access memory are connected to the generated buss. Sample of control units is carried out by decoders DD10, DDI 1.
In designed by MP service of interruptions carries out one control unit VN59. It is connected to the 8-digit system bus of the data (HD), and also to the management bus (HU). For address sample of internal registers the line of AO address from address bus is used. Control units for which interruptions are necessary are connected To entries IR0-IR7. As cascade operations it is not required, therefore inverse entry SP/EN is earthed.
Formation of three 8-bit two-forked interfaces Port А, В, С carries out control unit VV55. Its leading-outs are connected to matching lines HD; HA, HU. The given control unit works in regime Mb therefore lines PAO-7 and PBO-7 work input and output accordingly, and lines PCO-7 are used for operating signals.
Functions of feeding into from the 128-keyboard keyboard and information representation on one 8-discharge digital displays HL1 are carried out by control unit VV79. For scanning of the keyboard the control unit forms a bit pattern on lines SL0-SL3, analysing thus a condition of lines RL0-RL7. Transformation of a bit pattern to code sequences M0-M15 carries out the decoder of columns DD24, DD27. Exits of these decoders are connected to categories of 7-segment indicators, and also to keyboard lines. Direct management of indicators with the general anode decoders K514ID2, reformative carry out a bit pattern from lines PA0-PA2, PBO- PB2 in a 7-segment code. Lines РАЗ, PB3 are connected directly on leading-out H of indicators which refers to to a decimal point light-emitting diode. Entry S is connected to exit BD of the control unit for clearing of indicators.
Conclusion
In this term paper has been gained on the basis of complete set KP580. Given by possesses rather small speed. She allows to solve the problems connected with management by various production operations. The developed system allows to connect devices which demand dynamic change of time and frequency characteristics of their arrival signals. Presence at this MP of programmed parallel interface KR580VV55 provides three channels to which it is possible to connect, exchanging 8-digit words, and also allows to manipulate flexibly these channels, changing their mission. KP580BM80 is the microprocessor with the fixed set of commands that facilitates formulation of programs. ROM volume allows to write down functional enough program.
Reference list 1. Большие интегральные схемы запоминающих устройств: Справочник. - М.: Радио и связь, 1990. 2. Калабеков Б.А.. "Цифровые устройства и микропроцессорные системы". Москва 2003г. 3. Г. И. Пухальский. "Проектирование микропроцессорных систем". Санкт-Петербург 2001г. 4. Справочник, М.: Редакция, 1991 - 196 с. Интегральные микросхемы зарубежных стран и их аналоги производства СССР
The block diagram

Figure 12 The block diagram