Have you ever wondered how using a computer actually accomplishes tedious tasks? Tasks including connection to the internet, moving a file from one location to another, or having the ability to use a video application that helps interact with family in remote locations. If the needs of a computer were adequate enough to produce one specific function, such as typing, than the technologies we have now would not exist. The computers of today need to perform expeditious data processing for extensive data tasks. That’s approximately three billion calculates per second on just your average household computer. (Tymann 2008). This is all accomplished by programmable chip sets known as central processing units. Programmable codes within the central processing units are known as complex instruction set computing and reduced instruction set computing. Technologies in the present and the future depend on these architectures for expedited growth, without them society will halt in technological advances. These computing architectures provide the foundations of computer processing, although each having their specific advantages, disadvantages, pros, and cons. Information technology is rapidly growing, providing users and businesses a means to share digital data. Businesses gear towards investing money in all aspects of information technology systems to provide services for their customers. Users use computers as a means to communicate with family or watch the latest movie over the internet. As more digital data is generated annually, hardware and software manufacturers need to enhance their products (Stair 2010). Computing systems, telecommunications networks and information databases essentially need to keep up with incremental growth of data for the future. A computer simply processes what a user tells it to do, so how does that underlying process really work? Simple, the functional hardware and software of these architectures. Hardware and software engineers focus on complex instruction set computing and reduced instruction set computing. The ability to store information, send a message over the internet, and run a complex application on your computer relies on the inner workings of these computer architectures. Lets begin with the fundamental aspects of computing devices and understand the underlying functions of these architectures. First, electronic devices are composed of circuitry that acts as pathways to and from multiple destinations. For example, a driver in an automobile needs to get to work, finish a business project, and then go back home. Think of the driver as a computer user who needs to access a file, delete a folder, and then add a new folder within the computer. The automobile acts as the software instructions and makes a decision on how to get to this location based on the user's request from the instructions received from the driver. The pathways or streets the driver needs to take to accomplish his task is through electrical circuitry. Computers work by the concept of clock cycles. The various parts of a central processing unit hold instructions and data. Periodically they send this data along wires to the next processing station. To coordinate this activity, the computer provides a clock pulse. The clock pulse tells some circuits when to start sending data on the wires, while it tells other circuits when the data from the previous pulse should have already arrived. This defines a clock that is a regular pattern of alternating high and low voltages on a wire. It can be compared to the concept of clock that measures time. For instance, high voltage signal is a "tick" and the low voltage signal is a "tock". Each tick-tock sequence is called a cycle (Null 2006). Thus, creating alternating voltages in circuitry which a defining 1's for high voltage and 0's for low voltage. Using these variations of voltages differences creates logical gateways, which are formed at the hardware level, providing a way to control electricity. These gates translate into mathematical AND, OR, XOR functions (Kuphadt 2007). For instance, an AND gate is a sum of two electrical paths Meaning, if you want to combine one pathway of high voltage to a pathway of low voltage using an AND gate, you end up with a binary representation of two. This is due to the principles of software language which works in mathematical binary representations, where 2^1 would represent our AND gate. Looking at the hardware level on how electricity can be controlled and defined by binary representations introduces us to the foundations of software. By definition , software is the underlying language that is used to communicate and coordinate activities with the computer. (Meyers 2010). Software at a simple form is a way of creating instructions that can be processed by a hardware device. Creating a convention of binary coding allows use to instruct electronic devices ways to move, store, and manipulate all forms of digital data. Hardware and software have a distinct correlation between each other. They heavily rely on each another to efficiently function. The hardware allows for software to be stored in memory and executed based on its intentions. The software needs the hardware to execute its commands and accomplish multiple tasks, such as, display video output to a computer monitor.. They heavily rely on each other and are proportional to each other, meaning they affect each others performance. Thus, software would not be able to exist without hardware and hardware would be useless without software to tell it to perform a task. CISC and RISC architectures reside in a the central processing unit of the computer. The central processing unit is the brain of the computer composed of hardware and software that controls the requests between other hardware devices and the operating system. Think of a CPU as a man in the box who has four benches to work on. The benches represent the software and the man represents the hardware (Meyers, 2010). At the hardware level, the processor is composed of primarily transistors and silicon. Moore’s law states, “The number of transistors on a CPU would double every two years”(Null,2006).The These transistors are responsible for storing the data of alternating 1’s and 0’s that correlate to the alternating high and low voltages of the circuit. These translate at the software level to software language. These binary transistors store binary data used by software for translating output into machine language, which define the fundamental building blocks of reduced and complex computing architectures. As a result, the arithmetic logical unit and the control unit are formed within the CPU. They made up registers, known as, memory that are responsible for storing information and holding the commands that make up RISC and CISC architectures. The arithmetic unit performs all the various of calculations of mathematical processes, including addition, subtraction, multiplication, and division. On the other hand, the control unit acts as a traffic cop to decide the flow of data between operating system, hardware, and the arithmetic unit. With both these logical units working together it enables an a computer to accomplish billions of tasks in the matter of a second (Null 2006). Having a centralized “brain” within a computer enables software to carry out diverse tasks. The instructions written on a piece of software tell the CPU how to carry out the task. However, what makes CPU understand what is needed to be carried out? The low level software architectures of reduced instruction set computing and complex instruction set computing make all of this possible. Complex instruction set computing, known as CISC, is a software language used to code the underlying process for CPU functionality. The primary goal of CISC architecture is to complete a task in as few lines of assembly as possible. This is achieved by building processor hardware that is capable of understanding and executing a series of operations. For example, a CISC processor would come prepared with a specific instruction “MULTI” . When executed, this instruction loads the two values into separate registers, multiplies the operands in the execution unit, and then stores the product in the appropriate register, known as a memory (Meyers 2010). Thus, the entire task of multiplying two numbers can be completed with one instruction. Reduced instruction set computing, also known as RISC processors are the only use simple instructions that can be executed within one clock cycle. Essentially, a clock cycle is the time it takes to alternate high to low voltage on the circuit. Previously, the example of a CISC processor taking a single line of code “MULTI” and carrying out the task in one instruction significantly deviates that of RISC. Therefore, the "MULT" command described above could be divided into three separate commands: "LOAD," which moves data from the memory bank to a register, "PROD," which finds the product of two operands located within the registers, and "STORE," which moves data from a register to the memory banks. In order to perform the exact series of steps described in the CISC approach, a programmer would need to code four lines of assembly (Binstock 2011). These architectures have advantages, disadvantages, pros, and cons. Many hardware and software engineers frequently debate before the building a computer. These varieties of computers may be specifically designed to handle the backbone of a internet provider, a databases to store a company's critical data, a cell phone, or a personal computer you may have at home. The design of these architectures depends on the intended use of the computer and the specific software functions that it needs to carry out. For example, the internet is composed of thousands of computers that have a designed purpose of transferring and making sure data gets to its proper destination. These computers need to be designed to carry out these functions, where if personal computers attempted to carry out this task they would be unsuccessful. Pursuing this further, we will look at the major differences of CISC and RISC architectures. In general, RISC chips use simpler instructions sets to achieve higher clock frequencies and process more instructions per clock cycle than CISC processors. Typically, CISC chips have a large amount of different and complex instructions. The philosophy behind it is that hardware is always faster than software, therefore one should make a powerful instruction set, which provides programmers with assembly instructions to do a lot with short programs. However, CISC chips are relatively slow as compared to RISC chips per instruction. In addition, the architectures of CISC processors utilizes the concept of designating circuit pathways to memory in the form of a single system bus. Which is the consists of three pathways to memory consisting of a address line, memory line, and data line. Every time a computer performs a clock cycle the processor needs to wait to use one of these circuit pathways. Which causes the processor to run significantly slower. However, they have a high emphasis on hardware and have instruction sets that can accomplish complex tasks that are given to the processor. They suffer from the bottleneck of latency they needed from the circuit pathways, however, they make up in transfer performance by the use of caching mechanisms. Cache is memory reserved to act as a storage to the process, which allows the processor to avoid waiting for one of the pathways to free up. This nearly eliminates the wait time for processor to fetch a instruction. Moreover, RISC architectures have simplistic low level code that performs functions within single clock cycles. They needed more clock cycles to finish a task, although they are not limited by the circuit pathways to free up. If the address line is utilized in one cycle, then the processor is already using the data line within the next clock cycle. They also utilize the concept of using memory cache to increase performance. One task requires four clock cycles in comparison to one clock cycle for a instruction in CISC processor. These architectures have evolved over the years, although there is simply no better architecture. The both have their pros and cons. Although, there is still considerable controversy among experts about which architecture is better. One aspect that makes a CISC processor more adaptable is fewer hardware requirements needed to build it, while RISC processors need more hardware resources to carry out functions (DeMore 2000) Although, some say that RISC is cheaper and faster and therefor the architecture of the future. Others note that by making the hardware simpler, RISC puts a greater burden on the software and argue that software needs to become more complex. The reason behind this is that software developers need to write more lines accomplish tasks (Binstock 2011). Therefore, they argue that RISC is not the architecture of the future, since conventional CISC chips are becoming faster and enable few lines of code. In the near future, new technologies will develop with the aid of RISC and CISC architectures. Imagine the world with futuristic technologies such as robotics or even technologies that will help diverse fields of research. One example, may be a device to help diagnose and treat cancer. Computers have do not have any limitations. Hardware and software is always going to improve, especially with the ideas companies and individuals induce into society. The central processing unit “brain” is what delivers and enables computers to carry out various instructions. RISC and CISC architectures have been around since almost the beginning of the computer era. They enabled us to develop simplistic technologies, but over a time frame of thirty years, look where technology is now. The technological advances of the future are endless. The potentials of RISC and CISC architectures have not been fully achieved, nor they will be. Which architecture will be the victor of providing society its needs in future technologies? We don't know the answer, but sometime in the distant future the battle of CISC and RISC architectures might be irrelevant.