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Hsc12

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Using the Output Compare & Input Capture Functions on the HC12
Dr. Stephen Canfield, TTU ME Dept.
9/25/03 RLH

Introduction:
(From Cady and Sibigtroth, 2000). The Input Capture (IC) and Output Compare (OC) functions are an important part of the HC12 timer system. Port T is the IC/OC external register and TIOS is the Timer Input Capture/Output Compare Select register. The input capture generates an interrupt on a rising or falling edge of an input signal and captures the current value of TCNT on this event. Examples of uses of the IC function include counting events and timing events. The output compare generates an interrupt when the free-running counter (TCNT) is equal to a 16 bit value stored in one of the Timer Output Compare Register. In addition to generating the interrupt, the state of the associated output pin can be controlled to go low, high or toggle. Examples of uses of the OC function include generating a wave form with desired frequency and duty cycle or making precise timing applications.

Output Compare:

When a pin on Port T is programmed as an output compare pin, a value is loaded into the corresponding Timer Input Capture/Output Compare register (TCn) for comparison with TCNT. When a successful comparison is made (between TCn and TCNT), one of four actions may occur at the output pin in Port T. It can be disconnected, toggled, cleared or set. In addition, an interrupt request is generated which may be serviced in an ISR (refer to discussion on interrupts). The output compare function has several associated registers. Each is listed with its function in the following section. Note that these registers apply to both the input capture and output compare functions.

Timer Count Register, TCNT: This 16-bit register contains the value of the free-running counter.

Timer System Control Register, TSCR: This register controls the timer. In particular, bit 7 called TEN must be set to 1 to enable the timer.

Timer Input Capture/Output Compare Select, TIOS: The 8 pins, IOS0-IOS7 designate channels on Port T as input captures (value of 0, the default) or output compares (value of 1).

TC0 –TC7, Timer Input Capture/Output Compare Registers: These 8, 16-bit registers hold either a) the value for comparison with the TCNT register when using the output compare or b) the value of TCNT at a time when a selected edge is detected at the input capture pin.

Timer Interrupt Flag 1, TFLG1 register contains the timer interrupt flags, C0F-C7F. These flags are set when either: a) the value the TCNT and TCn register contents are equal when using the output compare or b) a selected edge is detected at the input capture pin when using the input capture.

Timer Interrupt Mask 1, TMSK1 register contains the timer interrupt enable bits, C0I-C7I. When the CnI is set to 0, the corresponding bit in TFLG1 is disabled from generating interrupts (default). When the CnI bit is set to 1, the corresponding bit in TFLG1 is able to generate an interrupt.

Timer Control register 1, TCTL1, and Timer Control register 2, TCTL2: These registers control the state of the output bits (the ones selected to be output compares). Upon successful compares, these bits can be disconnected (no action), toggled, cleared or set. These are set as combinations of the OMn and OLn.

Output Compare Software Checklist:
1. Initialize the interrupt vectors for each timer channel to be used (as appropriate)
2. Turn the timer system on, by writing a 1 to bit 7 in TSCR (enable the timer).
3. Configure the timer channels as either input captures or output compares (as desired). Set bits in the TIOS register to enable timer pins as output compares.
4. Configure the TCTL1 and TCTL2 bits (OMn and OMl) to cause output compare bits to go hi, lo, or toggle.
5. Load the current timer value (TCNT) into ACCD and add the desired delay to it.
6. Store ACCD (TCNT + delay) into the 16-bit Timer Compare register TCn (n = 0-7 for each of the 8 timer channels).
7. Reset the corresponding Input Capture/Output Compare Channel Flags (CnF) in TFLG1 (Reset by writing a 1 to the flags).
8. Enable the required interrupts in TMSK1 by setting these bits high.
9. Unmask global HC12 interrupts in the CCR with the CLI command.
10. Wait for the output compare through polling or interrupts (CnF is set).
11. Upon successful compare, reinitialize TCn with a new delay value (TCn + delay).
12. Reset the CnF bit (interrupt flag bit).

Output Compare Programming Example:
The following code (Servo.asm) demonstrates the use of interrupts and output compares to run and RC servo through a continuous sweeping pattern. The RC servo is controlled with a wave train of specific frequency and duty cycle. For these servo’s, the period must be between 18-25 ms., and the high-time of the waves determine the location of the output, on the range of 1-2 ms. approximately. 1ms corresponds to a minimum position while 2 ms corresponds to a maximum.
Input Capture:

When a pin on Port T is programmed as an input capture pin, the value of the free-running counter (TCNT) is captured and stored into the corresponding Timer Input Capture/Output Compare register (TCn) in response to an external signal coming from Port T. This external signal is program selected and can consist of 1) a rising edge on PTn, 2) a falling edge on PTn, or 3) a rising or falling edge on PTn. One example use of the input capture function is to measure the period of an incoming wave train. Another example is to accurately measure the time of an event, such as in time-of-flight measurements for an ultrasonic range-finder. Timer channel bits are configured as input captures by setting the desired port pins to 0 in the TIOS register. The edge select for each input capture channel are based on two bits in the TCTL3 and TCTL4 registers. Bits EDGnB and EDGnA control whether input capture n (ICn) is triggered on a rising, falling or both rising and falling edge. The input capture has several associated registers, most of which have been presented earlier in this handout. Additional registers are given as follows:

Timer Control register 3, TCTL3, and Timer Control register 4, TCTL4: These registers control the edge-detection ability of the selected input capture pin. These are set as combinations of the EDGnB and EDGnA bits (refer to following figures).

Input Capture Software Checklist:
1. Initialize the interrupt vectors for each timer channel to be used (as appropriate)
2. Turn the timer system on, by writing a 1 to bit 7 in TSCR (enable the timer).
3. Configure the timer channels as input captures (as desired). Reset bits in the TIOS register (to zero) to enable timer pins as input captures.
4. Configure the TCTL3 and TCTL4 register bits, EDGnB and EDGnA to select the type of edge to cause the input capture trigger.
5. Reset the corresponding Input Capture/Output Compare Channel Flags (CnF) in TFLG1 (Reset by writing a 1 to the flags).
6. Enable the required interrupts in TMSK1 by setting these bits high.
7. Unmask global HC12 interrupts in the CCR (clear the I bit in the CCR)with the CLI command.
8. Wait for the input capture to trigger through polling or interrupts (CnF is set).
9. After the input capture event occurs, read the data in TCn register and use according to your application.
10. Reset the CnF bit (interrupt flag bit).

Input Capture Programming Example:
The following program (sonar.asm) is created to interface with the polaroid sonar modules to provide distance measurements. The interface between the HC12 and Polaroid ranger consists here of two leads, an INIT lead which initiates the range measurement (from HC12 to Polaroid), and an ECHO lead, which indicates recieved wave (from Polaroid to HC12). The HC12 must measure the time between INIT and ECHO, which gives time of flight for the UT wave to travel from the sensor to the object and back. Note that a Pull-up resistor of 4.7 kohms is required on the ECHO lead. In this code, the INIT pin is connected to PA3 and the ECHO is recieved on PT1 (here configured as an input capture). The variable distance records 2*time-of-flight in terms of clock cycles. Note that in this code, calling subroutine SONAR initiates a range measurement, and the ISR completes the measurement, storing the result to distance. In this code, a waveform is generated on PA7 with frequency proportional to the distance.

Pulse Accumulator:
The pulse accumulator is a 16-bit accumulator that counts external events. PT-7 (timer channel 7) is used as the pulse accumulator input. You can select whether counts are made on a rising or falling edge. In addition, the pulse accumulator can be configured to generate an interrupt when either the accumulator overflows (goes for $ffff to $0000) or when an input edge is triggered. Of course the pulse accumulator can be used to count events, for example motor revolutions. However, it can also be used to take action after a specific number of counts by first storing the value #$ffff - #desired in the pulse accumulator count register (PACNT, $00A2-00A3), and then setting the interrupt to occur at overflow.

Pulse Accumulator Control Register (PACTL, $00A0)
Pulse Accumulator Count Register (PACNT, $00A2-00A3)
Pulse Accumulator Flag Register (PAFLG, $00A1)

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