Exercise 6-1: Graded Assignment
INSTRUCTIONS:

This quiz contains multiple choice questions. Select the best answer for each question.

If you want to change your answer, click the check box again to de-select it.

Top of Form
1. What is the hexadecimal equivalent of 10011110102?

a) 27A
b) 9D2
c) AC2
d) 2FA
2. How many flip-flop stages are required for a 0-3000 count counter?

a) 11
b) 13
c) 10
d) 12
3. The expression A + (B + C) = (A + B) + C represents which law?

a) Commutative law of addition
b) Associative law of addition
c) Distributative law of addition
d) None of the above.
4. If J=1 and K=1, a JK flip-flop will ___________ after applying a clock pulse.

a) toggle
b) be reset
c) be set
d) not change
5. Which law is represented by the expression: B + A = A + B

a) Associative law of addition
b) Commutative law of addition
c) Distributive law of addition
d) Distributive law of multiplication
6. After programming, a fuse is permanently closed.

a) a. True
b) b. False
7. A higher propagation delay time indicates ______.

a) higher power
b) a faster gate
c) a slower gate
d) None of the above
8. After programming, an anti-fuse is permanently open.

a) a. True
b) b. False
9. There are _______ nibbles in _______.

a) 4, one byte.
b) 2, two bytes.
c) 8, two bytes.
d) 2, one byte.
10. Which is a rule of Boolean algebra

a) A + 1= A
b) A + A = 1
c) A * 1 = 1
d) A + A = A
11. How many binary bits are needed to represent 68210?

a) 10
b) 11
c) 8
d) 9
12. What is the decimal equivalent of 1001102?

a) 4610
b) 3810
c) 2410
d) 2210
13. A 5-bit Johnson counter is loaded with 01110. What will the count be after 2 clock pulses?

a) 01011
b) 10011
c) 11001
d) 11010
14. The fan-out for CMOS gates is ______ than the fan-out for TTL.

a) 5 times less
b) 10 times less
c) 20 times less
d) usually more
15. Which of the following is in POS form?

a) AB + CD
b) (A + C) (D + E)+ C
c) A + B (C + D)
d) (A + C) (A + B + C)
16. Apply DeMorgan's theorem to the following expression: X = A̅ B̅ D̅

a) X = A̅ + B̅ + D̅

b) X = A + B + D

c) X = A̅ + B̅ + D̅.

d) X = A + B + D
17. The most-significant bit (MSB) in the ______ code is the same as the _____ in the binary number you are converting.

a) BCD, LSB
b) Gray, LSB
c) Gray, MSB
d) ASCII, MSB
18. Which of the following Boolean expressions represents the commutative law for multiplication?

a) (A+B)C = AC+BC
b) AB+AC = AC+AB
c) (AB)C=A(BC)
d) AB = BA
19. How many locations can an eight bit SRAM, connected with 14 address lines access?

a) 32768
b) 16384
c) 8192
d) 4096
20. There are ______ bits in a nibble and ______ bits in a byte.

a) 2, 4
b) 4, 8
c) 4, 4
d) 8, 2
21. If J=0 and K=1, a JK flip-flop will ___________ after applying a clock pulse.

a) toggle
b) be reset
c) be set
d) not change
22. A five-stage asynchronous counter uses 74LS76 flip-flops. What is the propagation delay for the entire circuit if each chip has a tp = 15 ns?

a) 15 ns
b) 30 ns
c) 75 ns
d) 100 ns
23. What are all the possible states of a tristate device?

a) High level, low level and high impedance.
b) High level, low level and low impedance.
c) High level, low level, one and zero.
d) None of the above
24. If J=0 and K=0, a JK flip-flop will ___________ after applying a clock pulse.

a) toggle
b) be reset
c) be set
d) not change
25. _____ consists of logic blocks, I/O blocks and programmable interconnects.

a) GAL
b) CPLD
c) FPGA
d) SPLD
26. What is the highest possible terminal count for a 10 stage counter?

a) 1024
b) 1023
c) 512
d) 511
27. The following bits were received with odd parity. Which one was received in error?

a) 0100101101
b) 10010111101011
c) 111010110
d) 100100101010
28. Simplify the Boolean expression: B + AB.

a) AB
b) A
c) A+B
d) B
29. A/An _______ is a timer.

a) 555 Integrated circuit
b) encoder
c) 7446 integrated circuit
d) multiplexer
30. What is a floating gate?

a) A special type of MOS transistor used in EPROM technology
b) A special type of MOS transistor used in SRAM technology
c) The device used as the link in anti-fuse technology
d) A gate with a specific gravity greater than 1
31. An asynchronous counter has _________________.

a) the clock applied only to the least significant stage.
b) the clock applied to all stages simultaneously
c) the clock applied only to the most significant stages
d) None of the above
32. A clock oscillator is also known as _____.

a) a monostable multivibrator
b) an astable multivibrator
c) a bistable multivibrator.
d) a one shot.
33. After programming, an anti-fuse is permanently closed.

a) a. True
b) b. False
34. True or False: Analog electronic systems can represent continuous values.

a) True
b) False
35. A NAND gate produces a _______ when any input is low and a ______ when all inputs are high

a) high, high
b) low, high
c) high, low
d) low, low
36. FIFO memory _____.

a) Retrieves data in the same order as it was stored.
b) Retrieves data in the opposite order as it was stored.
c) Works like a cafeteria tray dispenser
d) None of the above
37. What does the R/W label on a RAM device indicate?

a) The Read function is enabled when LOW (0).
b) The Write function is enabled when HIGH (1)
c) Write function is enabled when LOW (0)
d) None of the above.
38. Non-volatile memory means _____.

a) data is not retained when power is removed.
b) data can not be stored indefinitely without being refreshed periodically.
c) data can be stored indefinitely without power.
d) data can be stored indefinitely without power if it is refreshed periodically
39. A synchronous counter has _________________.

a) the clock applied only to the least significant stage.
b) the clock applied to all stages simultaneously
c) the clock applied only to the most significant stages
d) None of the above
40. The code that allows only single bit transitions between code word values is _______

a) ASCII Code
b) Gray Code
c) Binary Coded Decimal
d) Encode
41. Simplify the following Boolean equation: B + (C + 1) (D + 1) (B + BC)

a) A
b) B + BC
c) B
d) 1
42. a flip-flop is used as the storage cell for _______ memory

a) EEPROM
b) SRAM
c) DRAM
d) EPROM
43. If J=1 and K=0, a JK flip-flop will ___________ after applying a clock pulse.

a) toggle
b) be reset
c) be set
d) not change
44. The type of diagram often used in sequential logic systems to show the progression through the states of the system is a ______ .

a) logic diagram
b) schemtatic diagram
c) state diagram
d) timing diagram
45. A one shot is also called ______ .

a) An astable multivibrator
b) A bistable multvibrator
c) A monostable multvibrator
d) none of the above
46. 5 volts is the ______ for TTL logic.

a) minimum power supply voltage for TTL
b) nominal power supply voltage for TTL
c) maximum power supply voltage for TTL
d) logic LOW (0) level
47. A/An _____ is a programmable logic device

a) GAL
b) CPLD
c) Both of the above
d) None of the above
48. a flip-flop is used as the storage cell for _______ memory

a) EEPROM
b) EPROM
c) DRAM
d) SRAM
49. An inverter can be replaced by ___________ (Mark all that apply).

a) A NAND gate with all its inputs tied together
b) An OR gate with all its inputs tied together
c) An AND gate with all its inputs tied together
d) A NOR gate with all its inputs tied together
50. How many flip-flops are needed for a modulus-64 counter?

a) 6
b) 5
c) 4
d) 3
51. The following bits were received with even parity. Which one was received in error?

a) 01100101101
b) 10010111101010
c) 111010110
d) 1101011010111
52. When three decade counters are cascaded together, how many count values are possible?

a) 1000
b) 300
c) 100
d) 30
53. What is the total ripple delay for an asynchronous mod 16 counter with each flip-flop having a propagation delay of 12 ns?

a) 10 ns
b) 40 ns
c) 48 ns
d) 320 ns
54. If the period of a digital signal is 20 us, what is its frequency?

a) 500 kHz
b) 50 kHz
c) 5 kHz
d) 500 Hz
55. After programming, a fuse is permanently open.

a) a. True
b) b. False
56. What is the fan-out for a gate logic having IoutLOW = 5 ma and IinLOW = 500 na?

a) 5
b) 10
c) 50
d) 10.5
57. An EPROM ______.

a) Losses data when power is removed.
b) is volatile memory.
c) can be erased with ultra-violet (UV) light
d) is electrically erasable PROM
58. Apply DeMorgan's theorem to the following expression: X = A̅ B̅ C̅ D̅

a) X = A̅ + B̅ + C̅ + D̅

b) X = A̅ + B̅ + C̅ + D̅.

c) X = A + B + C + D

d) A + B + C + D
Your Name

Bottom of Form